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Features
* Protocol
- USB Used as Physical Layer - Device Firmware Upgrade Class Compliant - USB Clock Auto-Configuration * In-System Programming - Read/Write Flash and EEPROM Memories - Read Device ID - Full-chip Erase - Read/Write Configuration Bytes - Security Setting from ISP Command - Remote Application Start Command * In-Application Programming/Self Programming (IAP) - Read/Write Flash and EEPROM Memories - Read Device ID - Block Erase - Read/Write Configuration Bytes - Bootloader Start
USB Microcontrollers
AT89C5131A USB Bootloader
Description
This document describes the USB bootloader functionalities as well as the USB protocol to efficiently perform operations on the on-chip Flash (EEPROM) memories. Additional information on the AT89C5131A product can be found in the AT89C5131A datasheet and the AT89C5131A errata sheet available on the Atmel web site. The bootloader software package (binary) currently used for production is available from the Atmel web site.
Bootloader Revision Revision 1.0.2 Revision 1.2.0
Purpose of Modifications First release Bootloader improvement
Date 25/03/2003 20/03/2007
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Functional Description
In-System Programming Capability (IAP)
The AT89C5131A bootloader facilitates In-System Programming and In-Application Programming. In-System Programming allows the user to program or reprogram a microcontroller on-chip Flash memory without removing it from the system and without the need of a pre-programmed application. The USB bootloader can manage a communication with a host through the USB bus. It can also access and perform requested operations on the on-chip Flash memory.
In-Application Programming or Self Programming Capability (ISP) Block Diagram
In-Application Programming (IAP) allows the reprogramming of a microcontroller on-chip Flash memory without removing it from the system and while the embedded application is running. The USB bootloader contains some Application Programming Interface routines named API routines that allow IAP by using the user's firmware. This section describes the different parts of the bootloader. Figure 1 shows the on-chip bootloader and IAP processes. Figure 1. Bootloader Process Description
On-chip User Application
External Host Via the USB Protocol Communication
ISP Communication Management
IAP User Call Management
Flash Memory Management
Flash Memory
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ISP Communication Management The purpose of this process is to manage the communication and its protocol between the onchip bootloader and an external device (host). The on-chip bootloader implements a USB protocol (see section "Protocol"). This process translates serial communication frames (USB) into Flash memory accesses (read, write, erase...).
User Call Management Several Application Program Interface (API) calls are available to the application program to selectively erase and program Flash pages. All calls are made through a common interface (API calls) included in the bootloader. The purpose of this process is to translate the application request into internal Flash memory operations. Flash Memory Management This process manages low level access to the Flash memory (performs read and write access).
Bootloader Configuration
Configuration and Manufacturer Information The table below lists Configuration and Manufacturer byte information used by the bootloader. This information can be accessed through a set of API or ISP commands.
Mnemonic BSB SBV SSB EB P1_CF P3_CF P4_CF Manufacturer Id1: Family code Id2: Product Name Id3: Product Revision Description Boot Status Byte Software Boot Vector Software Security Byte Extra Byte Port 1 Configuration Port 3 Configuration Port 4 Configuration Default Value FFh FCh FFh FFh FEh FFh FFh 58h D7h F7h DFh
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Mapping and Default Value of Hardware Security Byte
The 4 MSB of the Hardware Byte can be read/written by software (this area is called Fuse bits). The 4 LSB can only be read by software and written by hardware in parallel mode (with parallel programmer devices).
Bit Position 7 6 5 4 3 2 1 0 Mnemonic X2B BLJB OSCON1 OSCON0 reserved LB2 LB1 LB0 Default Value U P U U U P U U To lock the chip (see datasheet) Description To start in x1 mode To map the boot area in code area between F800h-FFFFh Oscillator control (bit 1) Oscillator control (bit 0)
Note:
U: Unprogrammed = 1 P: Program = 0
Security
The bootloader has Software Security Byte (SSB) to protect itself from user access or ISP access. The Software Security Byte (SSB) protects from ISP accesses. The command "Program Software Security Bit" can only write a higher priority level. There are three levels of security: * Level 0: NO_SECURITY (FFh) This is the default level. From level 0, one can write level 1 or level 2. Level 1: WRITE_SECURITY (FEh) In this level it is impossible to write in the Flash memory. The Bootloader returns an err_WRITE status. From level 1, one can write only level 2. Level 2: RD_WR_SECURITY (FCh) Level 2 forbids all read and write accesses to/from the Flash memory. The Bootloader returns an err_WRITE or an err_VENDOR status.
*
*
Only a full chip erase command can reset the software security bits.
Level 0 Flash/EEPROM Fuse bit BSB & SBV & EB SSB Manufacturer info Bootloader info Erase block Full chip erase Blank Check Any access allowed Any access allowed Any access allowed Any access allowed Read only access allowed Read only access allowed Allowed Allowed Allowed Level 1 Read only access allowed Read only access allowed Any access allowed Write level2 allowed Read only access allowed Read only access allowed Not allowed Allowed Allowed Level 2 All access not allowed All access not allowed Any access allowed Read only access allowed Read only access allowed Read only access allowed Not allowed Allowed Allowed
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In-System Programming
ISP allows the user to program or reprogram a microcontroller's on-chip Flash memory through the USB bus without removing it from the system and without the need of a pre-programmed application. This section describes how to start the USB bootloader and the higher level protocol over the USB.
Boot Process
The bootloader can be activated in two ways: * * Hardware conditions Regular boot process
Figure 3 and Figure 4 describe the boot process flows for low pin count and high pin count products. High Pin Count Hardware Conditions The Hardware conditions (EA = 1, PSEN = 0) during the RESET rising edge force the on-chip bootloader execution. In this way the bootloader can be carried out regardless of the user Flash memory content. It is recommended to pull the PSEN pin down to ground though a 1K resistor to prevent the PSEN pin from being damaged (see Figure 2 below). Figure 2. ISP Hardware conditions
VCC VCC
VCC EA ALE Unconnected
C2 RST XTAL2 GND Crystal GND C1
Bootloader
/PSEN XTAL1
1K GND GND
VSS GND
As PSEN is an output port in normal operating mode (running user application or bootloader code) after reset, it is recommended to release PSEN after rising edge of reset signal. The hardware conditions are sampled at reset signal rising edge, thus they can be released at any time when reset input is high.
Low Pin Count Hardware Conditions
The Hardware Condition forces the bootloader execution from reset. The default factory Hardware Condition is assigned to port P1. * P1 must be equal to FEh In order to offer the best flexibility, the user can define its own Hardware Condition on one of the following Ports: * Port1
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* *
Port3 Port4 (only bit0 and bit1)
The Hardware Condition configuration are stored in three bytes called P1_CF, P3_CF, P4_CF. These bytes can be modified by the user through a set of API or through an ISP command. There is a priority between P1_CF, P3_CF and P4_CF (see Figure 4 on page 9).
Note: The BLJB must be at 0 (programmed) to be able to restart the bootloader. If the BLJB is equal to 1 (unprogrammed) only the hardware parallel programmer can change this bit (see AT89C5131A datasheet for more details).
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Software Boot Vector
The default value [FF]00h is used in ISP mode. The boot address is, in this mode, the lowest adress of FM1 USB bootloader. The Software Boot Vector (SBV) can be used to force the execution of a user bootloader starting at address [SBV]00h in the application area (FM0). The way to start this user bootloader is described in section "Boot Process".
USB Bootloader [FC]00h User Bootloader Application [SBV]00h FM1
FM0
FLIP Software Program
FLIP is a PC software program running under Windows(R) 9x/Me/2000/XP and Linux(R) which can be used in ISP mode and which supports all Atmel C51 Flash microcontroller and USB protocol communication media. The FLIP software program is free and is available from the Atmel web site.
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Figure 3. High-pin Count Regular Boot Process
RESET B it E N B O O T in A U XR 1 R egis ter is Initialized with B LJ B inverted ENBOOT = 1 P C = F 400h F C O N = 00h
Hardware Boot Process
H ardw are C ondition No ENBOOT = 0 P C = 0000h
Y es
Y es
B LJ B = 1 ENBOOT = 1 P C = F 400h F C O N = 0F h
No
Software Boot Process
F C O N = 00h
Y es
No
S B V < 7F h
No
Y es
S ta rt A p p lica tio n
S ta rt U se r B o o tlo a d e r
S ta rt B o o tlo a d e r
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Figure 4. Low-pin Count Regular Boot Process
RESET Bit ENBOOT in AUXR1 Register is Initialized with BLJB Inverted
Hardware Boot Process
ENBOOT = 0 PC = 0000h
Yes
BLJB = 1 ENBOOT = 1 PC = F400h
No
No
P1_CF = FFh
Yes
No
P1_CF = P1 Yes
No
P3_CF = FFh
Yes
Software Boot Process
No
P3_CF = P3
No
P4_CF = FFh
Yes
Yes No P4_CF = P4
Yes
BSB = 0
Yes
No
SBV < 7Fh Yes
No
Start Application
Start User Bootloader
Start Bootloader
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Physical Layer
The USB norm specifies all the transfers over the USB line. The USB specification also includes several CLASS and SUB-CLASS specifications. These stand-alone documents are used by the manufacturer to implement a USB link between a PC and a device supporting the In System Programming. Mostly, the USB specification is implemented by hardware (automatic reply, handshakes, timings, ...) and the USB Classes and SubClasses are implemented by software at a data level. Figure 5. USB Bus Topography Downstream Transfer: OUT Upstream Transfer: IN PC Driver PC Application USB Line Application (Device) PC (Host) The USB is used to transmit information that has the following configuration: * * USB DFU using the Default Control Endpoint only (endpoint 0) with a 32 bytes length. 48 MHz for USB controller: USB clock configuration performed by the bootloader Device driver/API Firmware
48 MHz Frequency Auto-Configuration
The bootloader includes a function which will automatically setup the PLL frequency (48MHz) versus the different XTAL configuration used on the application. The table below shows the allowed frequencies compatible with the USB bootloader 48 MHz auto-generation.
6 MHz X1 or X2 Clock Modes 8 MHz 12 MHz 16 MHz 20 MHz 24 MHz 32 MHz 40 MHz 48 MHz
OK
OK
OK
OK
OK
OK
OK
OK
OK
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Figure 6. 48 MHz Frequency Auto-Configuration
MAIN
No
USB Connected? Suspend/Resume
No
Yes Resume Detected? Yes Configure PLL for Frequency X Configure Timer 0
Yes
SOF Detected?
No
Timer 0 Overflow?
No
Yes
Change Frequency
USB Scheduler
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Protocol
Device Firmware Upgrade Introduction Device Firmware Upgrade is the mechanism for accomplishing the task of upgrading the device firmware. Any class of USB device can exploit this capability by supporting the requirements specified in this document. Because it is impractical for a device to concurrently perform both DFU operations and its normal run-time activities, those normal activities must cease for the duration of the DFU operations. Doing so means that the device must change its operating mode; i.e., a printer is not a printer while it is undergoing a firmware upgrade; it is a PROM programmer. However, a device that supports DFU is not capable of changing its mode of operation on its own. External (human or host operating system) intervention is required. DFU Specific Requests
In addition of the USB standard requests, 7 DFU class-specific requests are employed to accomplish the upgrade operations (Table 1):
Table 1. DFU Class-specific Requests
bmRequestType
0010 0001b 0010 0001b 1010 0001b 1010 0001b 0010 0001b 1010 0001b 0010 0001b
bRequest
DFU_DETACH (0) DFU_DNLOAD (1) DFU_UPLOAD (2) DFU_GETSTATUS (3) DFU_CLRSTATUS (4) DFU_GETSTATE (5) DFU_ABORT (6)
wValue
wTimeout wBlock wBlock Zero Zero Zero Zero
wIndex
Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) Interface (4)
wLength
Zero Length Length 6 Zero 1 Zero
Data
none Firmware Firmware Status none State none
DFU Descriptors Set
The device exports the DFU descriptor set, which contains: * * * * A DFU device descriptor A single configuration descriptor A single interface descriptor (including descriptors for alternate settings, if present) A single functional descriptor
DFU Device Descriptor
This descriptor is only present in the DFU mode descriptor set. The DFU class code is reported in the bDeviceClass field of this descriptor. Table 2. USB Parameters
Parameter
Vendor ID Product ID Release Number
Atmel - AT89C5131A Bootloader
0x03EB 0x2FFD 0x0000
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Table 3. DFU Mode Device Descriptor
Offset
0 1 2 4 5 6 7 8 10 12 14 15 16 17
Field
bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubClass bDeviceProtocol bMaxPacketSize0 idVendor idProduct bcdDevice iManufacturer iProduct iSerialNumber bNumConfigurations
Size
1 1 2 1 1 1 1 2 2 2 1 1 1 1
Value
12h 01h 0100h FEh 01h 00h 32 03EBh 2FFDh 0x0000 0 0 0 01h
Description
Size of this descriptor, in bytes DFU FUNCTIONAL descriptor type USB specification release number in binary coded decimal Application Specific Class Code Device Firmware Upgrade Code The device does not use a class specific protocol on this interface Maximum packet size for endpoint zero Vendor ID Product ID Device release number in binary coded decimal Index of string descriptor Index of string descriptor Index of string descriptor One configuration only for DFU
DFU Configuration Descriptor
This descriptor is identical to the standard configuration descriptor described in the USB DFU specification version 1.0, with the exception that the bNumInterfaces field must contain the value 01h. This is the descriptor for the only interface available when operating in DFU mode. Therefore, the value of the bInterfaceNumber field is always zero.
DFU Interface Descriptor
Table 4. DFU Mode Interface Descriptor
Offset
0 1 2 3 4 5 6 7 8
Field
bLength bDescriptorType bInterfaceNumber bAlternateSetting bNumEndpoints bInterfaceClass bInterfaceSubClass bInterfaceProtocol iInterface
Size
1 1 1 1 1 1 1 1 1
Value
09h 04h 00h 00h 00h FEh 01h 00h 00h
Description
Size of this descriptor, in bytes INTERFACE descriptor type Number of this interface Alternate setting(1) Only the control pipe is used Application Specific Class Code Device Firmware Upgrade Code The device doesn't use a class specific protocol on this interface Index of the String descriptor for this interface
Note:
1. Alternate settings can be used by an application to access additional memory segments. In this case, it is suggested that each alternate setting employ a string descriptor to indicate the target memory segment; e.g., "EEPROM". Details concerning other possible uses of alternate settings are beyond the scope of this document. However, their use is intentionally not restricted because the authors anticipate that implementers will devise additional creative uses for alternate settings.
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DFU Functional Descriptor Table 5. DFU Functional Descriptor
Offset
0 1
Field
bLength bDescriptorType
Size
1 1
Value
07h 21h
Description
Size of this descriptor, in bytes DFU FUNCTIONAL descriptor type DFU Attributes: bit 7..3: reserved bit 2: device is able to communicate via USB after Manifestation phase 1 = yes, 0 = no, must see bus reset bit 1: bitCanUpload : upload capable 1 = yes, 0 = no bit 0: bitCanDnload : download capable 1 = yes, 0 = no Time in milliseconds that the device will wait after receipt of the DFU_DETACH request.
2
bmAttributes
1
Bit mask
3
wDetachTimeOut
2
Number
If this time elapses without a USB reset, the device will terminate the Reconfiguration phase and revert back to normal operation. This represents the maximum time that the device can wait (depending on its timers, ...). The Host may specify a shorter timeout in the DFU_DETACH request. Maximum number of bytes that the device can accept per controlwrite transaction
5
wTransferSize
2
Number
Command Description
This protocol allows to: * * * * * * * Initiate the communication Program the Flash or EEPROM Data Read the Flash or EEPROM Data Program Configuration Information Read Configuration and Manufacturer Information Erase the Flash Start the application
Overview of the protocol is detailed in Appendix-A.
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Device Status
Get Status The Host employs the DFU_GETSTATUS request to facilitate synchronization with the device. This status gives information on the execution of the previous request: in progress/OK/Fail/...
bmRequestType
1010 0001b 0010 0001b
bRequest
DFU_GETSTATUS (3) DFU_CLRSTATUS (4)
wValue
Zero Zero
wIndex
Interface (4) Interface (4)
wLength
6 Zero
Data
Status none
The device responds to the DFU_GETSTATUS request with a payload packet containing the following data: Table 6. DFU_GETSTATUS Response
Offset
0
Field
bStatus
Size
1
Value
Numb er
Description
An indication of the status resulting from the execution of the most recent request. Minimum time in milliseconds that the host should wait before sending a subsequent DFU_GETSTATUS. The purpose of this field is to allow the device to dynamically adjust the amount of time that the device expects the host to wait between the status phase of the next DFU_DNLOAD and the subsequent solicitation of the device's status via DFU_GETSTATUS. An indication of the state that the device is going to enter immediately following transmission of this response. Index of status description in string table.
1
bwPollTimeOut
3
Numb er
4
bState
1
Numb er Index
5
iString
1
Table 7. bStatus values
Status
OK errTARGET errFILE errWRITE errERASE errCHECK_ERASED errPROG errVERIFY errADDRESS errNOTDONE errFIRMWARE errVENDOR
Value
0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B
Description
No error condition is present File is not targeted for use by this device File is for this device but fails some vendor-specific verification test Device id unable to write memory Memory erase function failed Memory erase check failed Program memory function failed Programmed memory failed verification Cannot program memory due to received address that is out of range Received DFU_DNLOAD with wLength = 0, but device does not think it has all the data yet. Device's firmware is corrupted. It cannot return to run-time operations
iString indicates a vendor-specific error
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Table 7. bStatus values (Continued)
Status
errUSBR errPOR errUNKNOWN errSTALLEDPK
Value
0x0C 0x0D 0x0E 0x0F
Description
Device detected unexpected USB reset signaling Device detected unexpected power on reset Something went wrong, but the device does not know what it was Device stalled an unexpected request
Table 8. bState Values
State
appIDLE appDETACH dfuIDLE dfuDNLOAD-SYNC dfuDNBUSY dfuDNLOAD-IDLE
Value
0 1 2 3 4 5
Description
Device is running its normal application Device is running its normal application, has received the DFU_DETACH request, and is waiting for a USB reset Device is operating in the DFU mode and is waiting for requests Device has received a block and is waiting for the Host to solicit the status via DFU_GETSTATUS Device is programming a control-write block into its non volatile memories Device is processing a download operation. Expecting DFU_DNLOAD requests Device has received the final block of firmware from the Host and is waiting for receipt of DFU_GETSTATUS to begin the Manifestation phase
dfuMANIFEST-SYNC
6
or device has completed the Manifestation phase and is waiting for receipt of DFU_GETSTATUS.
dfuMANIFEST dfuMANIFEST-WAITRESET dfuUPLOAD-IDLE dfuERROR
7 8
Device is in the Manifestation phase. Device has programmed its memories and is waiting for a USB reset or a power on reset. The device is processing an upload operation. Expecting DFU_UPLOAD requests. An error has occurred. Awaiting the DFU_CLRSTATUS request.
9 10
Clear Status
Any time the device detects an error and reports an error indication status to the host in the response to a DFU_GETSTATUS request, it enters the dfuERROR state. The device cannot transition from the dfuERROR state, after reporting any error status, until after it has received a DFU_CLRSTATUS request. Upon receipt of DFU_CLRSTATUS, the device sets a status of OK and transitions to the dfuIDLE state. Only then is it able to transition to other states.
bmRequestType
0010 0001b
bRequest
DFU_CLRSTATUS (4)
wValue
Zero
wIndex
Interface (4)
wLength
0
Data
None
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Device State This request solicits a report about the state of the device. The state reported is the current state of the device with no change in state upon transmission of the response. The values specified in the bState field are identical to those reported in DFU_GETSTATUS.
bmRequestType
1010 0001b
bRequest
DFU_GETSTATE (5)
wValue
Zero
wIndex
Interface (4)
wLength
1
Data
State
DFU_ABORT request
The DFU_ABORT request enables the device to exit from certain states and return to the DFU_IDLE state. The device sets the OK status on receipt of this request. For more information, see the corresponding state transition summary.
bmRequestType
1010 0001b
bRequest
DFU_ABORT (6)
wValue
Zero
wIndex
Interface (4)
wLength
0
Data
None
Programming the Flash or EEPROM Data
The firmware image is downloaded via control-write transfers initiated by the DFU_DNLOAD class-specific request. The host sends between bMaxPacketSize0 and wTransferSize bytes to the device in a control-write transfer. Following each downloaded block, the host solicits the device status with the DFU_GETSTATUS request. As described in the USB DFU Specification, "Firmware images for specific devices are, by definition, vendor specific. It is therefore required that target addresses, record sizes, and all other information relative to supporting an upgrade are encapsulated within the firmware image file. It is the responsibility of the device manufacturer and the firmware developer to ensure that their devices can consume these encapsulated data. With the exception of the DFU file suffix, the content of the firmware image file is irrelevant to the host." Firmware image: * * 32 bytes: Command X bytes: X is the number of byte (00h) added before the first significative byte of the firmware. The X number is calculated to align the beginning of the firmware with the flash page. X = start_address [32]. For example, if the start address is 00AFh (175d), X = 175 [32] = 15. The firmware The DFU Suffix on 16 Bytes.
* *
Table 9. DFU File Suffix
Offset
-0 -4
Field
dwCRC bLength
Size
4 1
Value
Number 16 5 : 44h
Description
The CRC of the entire file, excluding dwCRC The length of this DFU suffix including dwCRC
-5
ucDfuSignature
3
6 : 46h 7 : 55h
The unique DFU signature field
-8
bcdDFU
2
BCD 0100h ID
DFU specification number The vendor ID associated with this file. Either FFFFh or must match device's vendor ID
-10
idVendor
2
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Offset
-12
Field
idProduct
Size
2
Value
ID
Description
The product ID associated with this file. Either FFFFf or must match the device's product ID The release number of the device associated with this file. Either FFFFh or a BCD firmware release or version number
-14
bcdDevice
2
BCD
Request From Host
bmRequestType
0010 0001b
bRequest
DFU_DNLOAD (1)
wValue
wBlock
wIndex
Interface (4)
wLength
Length
Data
Firmware
Write Command
Command Identifier
Id_prog_start 01h 01h
data[0]
00h
data[1]
data[2]
data[3]
data[4]
Description
Init FLASH programming
start_address
end_address
Init EEPROM programming
The write command is 6 bytes long. In order to reach the USB specification of the Control type transfers, the write command is completed with 26 (= 32 - 6) non-significant bytes. The total length of the command is then 32 bytes, which is the length of the Default Control Endpoint. Firmware The firmware can now be downloaded to the device. In order to be in accordance with the Flash page size (128 bytes), X non-significant bytes are added before the first byte to program. The X number is calculated to align the beginning of the firmware with the Flash page. X = start_address [32]. For example, if the start address is 00AFh (175d), X = 175 [32] = 15. The DFU suffix of 16 bytes are added just after the last byte to program. This suffix is reserved for future use.
DFU Suffix
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Figure 7. Example of Firmware Download Zero Length DFU_DNLOAD Request SETUP OUT OUT OUT DFU_DNLOAD Prog_Start + (EP0 fifo length - 6) x 00h X offset bytes + Firmware Packet 1 Firmware Packet 2
OUT IN
Firmware Packet n + DFU suffix ZLP The Host sends a DFU_DNLOAD request with the wLength field cleared to 0 to the device to indicate that it has completed transferring the firmware image file. This is the final payload packet of a download operation. This operation should be preceded by a Long Jump address specification using the corresponding Flash command.
Answers from Bootloader
After each program request, the Host can request the device state and status by sending a DFU_GETSTATUS message. If the device status indicates an error, the host can send a DFU_CLRSTATUS request to the device.
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Reading the Flash or EEPROM Data
The flow described below allows the user to read data in the Flash memory or in the EEPROM data memory. A blank check command on the Flash memory is possible with this flow. This operation is performed in 2 steps: 1. DFU_DNLOAD request with the read command (6 bytes) 2. DFU_UPLOAD request which correspond to the immediate previous command.
First Request from Host
The Host sends a DFU Download request with a Display command in the data field.
SETUP OUT IN
DFU_DNLOAD Display_Data (6 bytes) ZLP
Command Identifier
data[0]
00h
data[1]
data[2]
data[3]
data[4]
Description
Display FLASH Data
Id_display_data 03h
01h 02h
start_address
end_address
Blank Check in FLASH Display EEPROM Data
Second Request from Host Answers from the Device
The Host sends a DFU Upload request.
The device send to the Host the firmware from the specified start address to the end address. SETUP IN IN DFU_UPLOAD Firmware Packet 1 Firmware Packet 2
IN OUT
Firmware Packet n ZLP
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Answers from the Device to a Blank Check Command The Host controller send a GET_STATUS request to the device. Once internal blank check has been completed, the device sends its status. * * If the device status is "OK": the device memory is then blank and the device waits the next Host request. If the device status is "errCHECK_ERASED": the device memory is not blank. The device waits for an DFU_UPLOAD request to send the first address where the byte is not 0xFF.
Programming Configuration Information
The flow described below allows the user to program Configuration Information regarding the bootloader functionality. * Boot Process Configuration: - - - - BSB SBV P1_CF, P3_CF and P4_CF Fuse bits (BLJB, X2 and OSCON bits) (see section "Mapping and Default Value of Hardware Security Byte")
Take care that the Program Fuse bit command programs the 4 Fuse bits at the same time. Request from Host To start the programming operation, the Host sends DFU_DNLOAD request with the Write command in the data field (6 bytes). SETUP OUT IN DFU_DNLOAD Write_command (6 bytes) ZLP
Command Identifier
data[0]
data[1]
00h 01h 02h
data[2]
data[3]
data[4]
Description
Write value in BSB Write value in SBV Write P1_CF
01h Id_write_command 04h
03h 04h 05h 06h
Value
Write P3_CF Write P4_CF Write value in SSB Write value in EB
02h
00h
Value
Write value in Fuse (HSB)
Answers From Bootloader
The device has two possible answers to a DFU_GETSTATUS request: * * If the chip is protected from program access, a "err_WRITE" status is returned to the Host. Otherwise, the device status is "OK".
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Reading Configuration Information or Manufacturer Information Requests From Host
The flow described below allows the user to read the configuration or manufacturer information.
To start the programming operation, the Host sends DFU_DNLOAD request with the Read command in the data field (2 bytes). SETUP OUT IN DFU_DNLOAD Read_command (2 bytes) ZLP
Command Identifier
data[0]
data[1]
00h
data[2]
data[3]
data[4]
Description
Read Bootloader Version Read Device boot ID1 Read Device boot ID2 Read BSB Read SBV Read P1_CF Read P3_CF Read P4_CF Read SSB Read EB Read Manufacturer Code Read Family Code Read Product Name Read Product Revision Read HWB
00h
01h 02h 00h 01h 02h 03h
Id_read_command 05h 01h
04h 05h 06h 30h 31h 60h 61h 02h 00h
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AT89C5131A USB Bootloader
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AT89C5131A USB Bootloader
Answers from Bootloader The device has two possible answers to a DFU_GETSTATUS request: * * If the chip is protected from program access, an "err_VENDOR" status is returned to the Host. Otherwise, the device status is "OK". The Host can send a DFU_UPLOAD request to the device in order the value of the requested field.
SETUP IN OUT
DFU_UPLOAD Byte value (1 byte) ZLP
Erasing the Flash
The flow described below allows the user to erase the Flash memory. Two modes of Flash erasing are possible: * * Full Chip erase Block erase
The Full Chip erase command erases the whole Flash (32 Kbytes) and sets some Configuration Bytes at their default values: * * * BSB = FFh SBV = FFh SSB = FFh (NO_SECURITY)
The Block erase command erases only a part of the Flash. Three Blocks are defined in the AT89C5131A: * * * Request from Host block0 (From 0000h to 1FFFh) block1 (From 2000h to 3FFFh) block2 (From 4000h to 7FFFh)
To start the erasing operation, the Host sends a DFU_DNLOAD request with a Write Command in the data field (2 bytes).
Command Identifier
data[0]
data[1]
00h 20h
data[2]
data[3]
data[4]
Description
Erase block0 (0K to 8K) Erase block1 (8K to 16K) Erase block2 (16K to 32K) Full chip Erase (bits at FFh)
Id_write_command 04h
00h
40h FFh
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Answers from Bootloader
The device has two possible answers to a DFU_GETSTATUS request: * * If the chip is protected from program access, a "err_WRITE" status is returned to the Host. Otherwise, the device status is "OK".
The full chip erase is always executed whatever the Software Security Byte value is.
Starting the Application
The flow described below allows to start the application directly from the bootloader upon a specific command reception. Two options are possible: * Start the application with a reset pulse generation (using watchdog). When the device receives this command the watchdog is enabled and the bootloader enters a waiting loop until the watchdog resets the device. Take care that if an external reset chip is used the reset pulse in output may be wrong and in this case the reset sequence is not correctly executed. Start the application without reset A jump at the address 0000h is used to start the application without reset.
*
To start the application, the Host sends a DFU_DNLOAD request with the specified application start type in the data field (3 or 5bytes). This request is immediately followed by a second DFU_DNLOAD request with no data field to start the application with one of the 2 options. Request From Host SETUP IN OUT DFU_UPLOAD Jump Option (3 or 5 Bytes) ZLP
SETUP
DFU_UPLOAD
Command Identifier
Id_write_command 04h
data[0]
data[1]
00h
data[2]
data[3]
data[4]
Description
Hardware reset
03h 01h address LJMP address
Answer from Bootloader No answer is returned by the device.
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AT89C5131A USB Bootloader
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AT89C5131A USB Bootloader
In-Application Programming/S elf Programming
The IAP allows to reprogram a microcontroller on-chip Flash memory without removing it from the system and while the embedded application is running. The user application can call Application Programming Interface (API) routines allowing IAP. These API are executed by the bootloader. To call the corresponding API, the user must use a set of Flash_api routines which can be linked with the application. Example of Flash_api routines are available on the Atmel web site on the software package: C Flash Drivers for the AT89C5131A for Keil(R) Compilers The flash_api routines on the package work only with the USB bootloader. The flash_api routines are listed in APPENDIX-B.
API Call
Process The application selects an API by setting the 4 variables available when the flash_api library is linked to the application. These four variables are located in RAM at fixed address: * * * * api_command: 1Ch api_value: 1Dh api_dph: 1Eh api_dpl: 1Fh
All calls are made through a common interface "USER_CALL" at the address FFC0h. The jump at the USER_CALL must be done by LCALL instruction to be able to comeback in the application. Before jump at the USER_CALL, the bit ENBOOT in AUXR1 register must be set. Constraints The interrupts are not disabled by the bootloader. Interrupts must be disabled by user prior to jump to the USER_CALL, then re-enabled when returning. Interrupts must also be disabled before accessing EEPROM data then re-enabled after. The user must take care of hardware watchdog before launching a Flash operation. For more information regarding the Flash writing time see the AT89C5131A datasheet.
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API Commands
Several types of APIs are available: * * * * * Read/Program Flash and EEPROM Data Memory Read Configuration and Manufacturer Information Program Configuration Information Erase Flash Start Bootloader
Read/Program Flash and EEPROM Data Memory
All routines to access EEPROM data are managed directly from the application without using bootloader resources. To read the Flash memory the bootloader is not involved. For more details on these routines see the AT89C5131A datasheet sections "Program/Code Memory" and "EEPROM Data Memory" Two routines are available to program the Flash: - - * __api_wr_code_byte __api_wr_code_page
The application program load the column latches of the Flash then calls the __api_wr_code_byte or __api_wr_code_page see datasheet in section "Program/Code Memory". Parameter settings
API Name
__api_wr_code_byte __api_wr_code_page
*
api_command
0Dh
api_dph
api_dpl
api_value
*
instruction: LCALL FFC0h.
No special resources are used by the bootloader during this operation
Note:
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AT89C5131A USB Bootloader
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AT89C5131A USB Bootloader
Read Configuration and Manufacturer Information * Parameter settings
API Name
__api_rd_HSB __api_rd_BSB __api_rd_SBV __api_rd_P1_CF __api_rd_P3_CF __api_rd_P4_CF __api_rd_SSB __api_rd_EB __api_rd_manufacturer __api_rd_device_id1 __api_rd_device_id2 __api_rd_device_id3 __api_rd_bootloader_version
api_command
08h 05h 05h 05h 05h 05h 05h 05h 05h 05h 05h 05h 0Eh
api_dph
api_dpl
00h 00h 01h 02h 03h 04h 05h 06h 30h 31h 60h 61h 00h
api_value
return HSB return BSB return SBV return P1_CF return P3_CF return P4_CF return SSB return EB return manufacturer id return id1 return id2 return id3 return value
* *
Instruction: LCALL FFC0h. At the complete API execution by the bootloader, the value to read is in the api_value variable.
No special resources are used by the bootloader during this operation
Note:
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Program Configuration Information
*
Parameter settings
API Name
__api_clr_BLJB __api_set_BLJB __api_clr_X2 __api_set_X2 __api_clr_OSCON1 __api_set_OSCON1 __api_clr_OSCON0 __api_set_OSCON0 __api_wr_BSB __api_wr_SBV __api_wr_P1_CF __api_wr_P3_CF __api_wr_P4_CF __api_wr_SSB __api_wr_EB
api_command
07h 07h 07h 07h 07h 07h 07h 07h 04h 04h 04h 04h 04h 04h 04h
api_dph
api_dpl
api_value
(HSB & BFh) | 40h HSB & BFh (HSB & 7Fh) | 80h HSB & 7Fh (HSB & DFh) | 20h HSB & DFh (HSB & EFh) | 10h HSB & EFh
00h 01h 02h 03h 04h 05h 06h
value to write value to write value to write value to write value to write value to write value to write
*
instruction: LCALL FFC0h.
1. See in the T89C51CC01 datasheet the time that a write operation takes. 2. No special resources are used by the bootloader during these operations.
Notes:
Erasing the Flash
The AT89C5131A Flash memory is divided in several blocks: Block 0: from address 0000h to 1FFFh Block 1: from address 2000h to 3FFFh Block 2: from address 4000h to 7FFFh These three blocks contain 128 pages. * Parameter settings
API Name
__api_erase_block0 __api_erase_block1 __api_erase_block2
api_command
00h 00h 00h
api_dph
00h 20h 40h
api_dpl
api_value
*
instruction: LCALL FFC0h.
1. See the AT89C5131A datasheet for the time that a write operation takes and this time must multiply by the number of pages. 2. No special resources are used by the bootloader during these operations.
Notes:
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AT89C5131A USB Bootloader
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AT89C5131A USB Bootloader
Starting the Bootloader This routine allows to start at the beginning of the bootloader as after a reset. After calling this routine the regular boot process is performed and the communication must be opened before any action. * * * No special parameter setting Set bit ENBOOT in AUXR1 register instruction: LJUMP or LCALL at address F400h
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Appendix-A
Table 10. Summary of Frames from Host
Command Identifier
Id_prog_start 01h
data[0]
00h
data[1]
data[2]
data[3]
data[4]
Description
Init FLASH programming
start_address 01h 00h
end_address Init EEPROM programming Display FLASH Data
Id_display_data 03h
01h 02h
start_address
end_address
Blank Check in FLASH Display EEPROM Data
00h 20h 00h 40h FFh 00h 01h Id_write_command 04h 01h 02h 03h 04h 05h 06h 02h 03h 01h address 00h 00h Value Value
Erase block0 (0K to 8K) Erase block1 (8K to 16K) Erase block2 (16K to 32K) Full chip Erase (bits at FFh) Write value in BSB Write value in SBV Write P1_CF Write P3_CF Write P4_CF Write value in SSB Write value in EB Write value in Fuse (HSB) Hardware reset LJMP address
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AT89C5131A USB Bootloader
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AT89C5131A USB Bootloader
Table 10. Summary of Frames from Host (Continued)
Command Identifier data[0] data[1]
00h 00h 01h 02h 00h 01h 02h 03h Id_read_command 05h 01h 04h 05h 06h 30h 31h 60h 61h 02h 00h
data[2]
data[3]
data[4]
Description
Read Bootloader Version Read Device boot ID1 Read Device boot ID2 Read BSB Read SBV Read P1_CF Read P3_CF Read P4_CF Read SSB Read EB Read Manufacturer Code Read Family Code Read Product Name Read Product Revision Read HWB
Table 11. DFU Class-specific Requests
bmRequestType
0010 0001b 0010 0001b 1010 0001b 1010 0001b 0010 0001b 1010 0001b 0010 0001b
bRequest
DFU_DETACH (0) DFU_DNLOAD (1) DFU_UPLOAD (2) DFU_GETSTATUS (3) DFU_CLRSTATUS (4) DFU_GETSTATE (5) DFU_ABORT (6)
wValue
wTimeout wBlock wBlock Zero Zero Zero Zero
wIndex
Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) Interface (4) Interface (4)
wLength
Zero Length Length 6 Zero 1 Zero
Data
none Firmware Firmware Status none State none
Table 12. USB Parameters
Parameter
Vendor ID Product ID Release Number
Atmel
0x03EB 0x2FFD 0x0000
Table 13. Hardware Security Byte (HSB)
7 X2 6 BLJB 5 OSCON1 4 OSCON0 3 2 LB2 1 LB1 0 LB0
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Appendix-2
Table 14. API Summary
Function Name
__api_rd_code_byte __api_wr_code_byte __api_wr_code_page __api_erase block0 __api_erase block1 __api_erase block2 __api_rd_HSB __api_clr_BLJB __api_set_BLJB __api_clr_X2 __api_set_X2 __api_clr_OSCON1 __api_set_OSCON1 __api_clr_OSCON0 __api_set_OSCON0 __api_rd_BSB __api_wr_BSB __api_rd_SBV __api_wr_SBV __api_erase_SBV __api_rd_P1_CF __api_wr_P1_CF __api_rd_P3_CF __api_wr_P3_CF __api_rd_P4_CF __api_wr_P4_CF __api_rd_SSB __api_wr_SSB __api_rd_EB __api_wr_EB __api_rd_manufacturer __api_rd_device_id1
Bootloader Execution
no yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes yes
api_command
api_dph
api_dpl
api_value
0Dh 0Dh 00h 00h 00h 08h 07h 07h 07h 07h 07h 07h 07h 07h 05h 04h 05h 04h 04h 05h 04h 05h 04h 05h 04h 05h 04h 05h 04h 05h 05h 00h 00h 01h 01h 01h 02h 02h 03h 03h 04h 04h 05h 05h 06h 06h 30h 31h 00h 20h 40h 00h return value (HSB & BFh) | 40h HSB & BFh (HSB & 7Fh) | 80h HSB & 7Fh (HSB & DFh) | 20h HSB & DFh (HSB & EFh) | 10h HSB & EFh return value value return value value FFh return value value return value value return value value return value value return value value return value return value
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AT89C5131A USB Bootloader
Table 14. API Summary (Continued)
Function Name
__api_wr_code_page __api_rd_device_id2 __api_rd_device_id3 __api_rd_bootloader_version __api_eeprom_busy __api_rd_eeprom_byte __api_wr_eeprom_byte __api_start_bootloader __api_start_isp
Bootloader Execution
yes yes yes yes no no no no no
api_command
01h 05h 05h 0Eh
api_dph
api_dpl
api_value
60h 61h 00h
return value return value return value
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4287E-USB-04/08

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